Ajou University repository

An Efficient Test Architecture Using Hybrid Built-In Self-Test for Processing-in-Memory
Citations

SCOPUS

0

Citation Export

Publication Year
2024-01-01
Publisher
Institute of Electrical and Electronics Engineers Inc.
Citation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keyword
Area overheadartificial intelligence (AI)built-in self-test (BIST)processing-in-memory (PiM)test coverage
Mesh Keyword
Area overheadArtificial intelligenceBuild in self testsBuild-in self-testBuiltin self tests (BIST)Data intensiveProcessing-in-memoryTest architectureTest-coverage
All Science Classification Codes (ASJC)
SoftwareHardware and ArchitectureElectrical and Electronic Engineering
Abstract
With the rapid advances in artificial intelligence (AI), the demand for data-intensive analytics has surged. Consequently, extensive research on AI acceleration has been conducted to enhance AI performance. Processing-in-memory (PiM) has emerged as a promising AI acceleration architecture, offering an unprecedented high-bandwidth connection between compute and memory. However, integrating many components in PiM can lead to yield degradation. To address this issue, we propose an efficient test architecture that utilizes a hybrid built-in self-test (BIST) for PiM. This architecture utilizes the structural and operational characteristics of PiM to facilitate testing. It can execute testing through the existing functional paths without requiring any additional hardware implementation in PiM. Furthermore, it achieves a 100% test coverage with the small number of test patterns. In addition, the functionality of self-test can be realized for PiM through reconfiguration of the existing hardware, resulting in a very small area overhead.
Language
eng
URI
https://dspace.ajou.ac.kr/dev/handle/2018.oak/34685
DOI
https://doi.org/10.1109/tvlsi.2024.3504539
Fulltext

Type
Article
Show full item record

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

 Lee, Hayoung Image
Lee, Hayoung이하영
Department of Intelligence Semiconductor Engineering
Read More

Total Views & Downloads

File Download

  • There are no files associated with this item.