Ajou University repository

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Showing results 1 to 10 of 1503 (Search time: 0.0 seconds).

A Robust Test Architecture for Low-Power AI Accelerators
  • 2024-01-01
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Institute of Electrical and Electronics Engineers Inc.
An Efficient Test Architecture Using Hybrid Built-In Self-Test for Processing-in-Memory
  • 2024-01-01
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Institute of Electrical and Electronics Engineers Inc.
SIP/MCP를 고려한 최적화된 바운드리 스캔 방법에 대한 고찰
  • 채은석
  • 2008-02
  • The Graduate School, Ajou University
A Built-In Self-Repair With Maximum Fault Collection and Fast Analysis Method for HBM
  • Yoon, Joonsik;
  • Lee, Hayoung;
  • Moon, Youngki;
  • Shin, Seung Ho;
  • Kang, Sungho
  • 2024-01-01
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Institute of Electrical and Electronics Engineers Inc.
An Area-Efficient Systolic Array Redundancy Architecture for Reliable AI Accelerator
  • 2024-01-01
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.32, pp.1950-1954
  • Institute of Electrical and Electronics Engineers Inc.
W-PAN에서의 채널 자원 재사용을 위한 MAC 프로토콜
  • 권의혁
  • 2005
  • The Graduate School, Ajou University
무선센서네트워크에서의 하이브리드 키 관리 기법
  • 구안 홍메이
  • 2007-02
  • The Graduate School, Ajou University
Crossover-SGD: A gossip-based communication in distributed deep learning for alleviating large mini-batch problem and enhancing scalabilityoa mark
  • Yeo, Sangho;
  • Bae, Minho;
  • Jeong, Minjoong;
  • Kwon, Oh Kyoung;
  • Oh, Sangyoon
  • 2023-07-10
  • Concurrency and Computation: Practice and Experience, Vol.35
  • John Wiley and Sons Ltd
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