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Area-Selective Atomic Layer Deposition for Resistive Random-Access Memory Devices
  • Oh, Il Kwon ;
  • Khan, Asir Intisar ;
  • Qin, Shengjun ;
  • Lee, Yujin ;
  • Wong, H. S.Philip ;
  • Pop, Eric ;
  • Bent, Stacey F.
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Publication Year
2023-09-13
Publisher
American Chemical Society
Citation
ACS Applied Materials and Interfaces, Vol.15, pp.43087-43093
Keyword
area-selective atomic layer depositiondata storage devicedielectricsfilament confinementresistive random-access memory
Mesh Keyword
Area selectiveArea-selective atomic layer depositionAtomic-layer depositionData storageData storage devicesFilament confinementHigh volumesNeuromorphic computingRandom access memoryResistive random-access memory
All Science Classification Codes (ASJC)
Materials Science (all)
Abstract
Resistive random-access memory (RRAM) is a promising technology for data storage and neuromorphic computing; however, cycle-to-cycle and device-to-device variability limits its widespread adoption and high-volume manufacturability. Improving the structural accuracy of RRAM devices during fabrication can reduce these variabilities by minimizing the filamentary randomness within a device. Here, we studied area-selective atomic layer deposition (AS-ALD) of the HfO2 dielectric for the fabrication of RRAM devices with higher reliability and accuracy. Without requiring photolithography, first we demonstrated ALD of HfO2 patterns uniformly and selectively on Pt bottom electrodes for RRAM but not on the underlying SiO2/Si substrate. RRAM devices fabricated using AS-ALD showed significantly narrower operating voltage range (2.6 × improvement) and resistance states than control devices without AS-ALD, improving the overall reliability of RRAM. Irrespective of device size (1 × 1, 2 × 2, and 5 × 5 μm2), we observed similar improvement, which is an inherent outcome of the AS-ALD technique. Our demonstration of AS-ALD for improved RRAM devices could further encourage the adoption of such techniques for other data storage technologies, including phase-change, magnetic, and ferroelectric RAM.
Language
eng
URI
https://dspace.ajou.ac.kr/dev/handle/2018.oak/33666
DOI
https://doi.org/10.1021/acsami.3c05822
Fulltext

Type
Article
Funding
The area-selective atomic layer deposition development was supported in part by NEW LIMITS, a center in nCORE, a Semiconductor Research Corporation (SRC) program sponsored by NIST, through award no. 70NANB17H041. This work was partially supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (nos. 2021R1F1A1063671 and 2021R1A4A1033155). E.P. and H.S.P.W. acknowledge support from the member companies of the Stanford Non-Volatile Memory Technology Research Initiative (NMTRI). A.I.K. acknowledges support from the Stanford Graduate Fellowship. The authors thank R. Islam for useful discussions at the initial phase of this work during its conceptualization. A.I.K. is thankful to M. Chen for the lab support.
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Oh, Il-Kwon 오일권
Department of Intelligence Semiconductor Engineering
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