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Area-Selective Atomic Layer Deposition for Resistive Random-Access Memory Devices
  • Oh, Il Kwon ;
  • Khan, Asir Intisar ;
  • Qin, Shengjun ;
  • Lee, Yujin ;
  • Wong, H. S.Philip ;
  • Pop, Eric ;
  • Bent, Stacey F.
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dc.contributor.authorOh, Il Kwon-
dc.contributor.authorKhan, Asir Intisar-
dc.contributor.authorQin, Shengjun-
dc.contributor.authorLee, Yujin-
dc.contributor.authorWong, H. S.Philip-
dc.contributor.authorPop, Eric-
dc.contributor.authorBent, Stacey F.-
dc.date.issued2023-09-13-
dc.identifier.urihttps://dspace.ajou.ac.kr/dev/handle/2018.oak/33666-
dc.description.abstractResistive random-access memory (RRAM) is a promising technology for data storage and neuromorphic computing; however, cycle-to-cycle and device-to-device variability limits its widespread adoption and high-volume manufacturability. Improving the structural accuracy of RRAM devices during fabrication can reduce these variabilities by minimizing the filamentary randomness within a device. Here, we studied area-selective atomic layer deposition (AS-ALD) of the HfO2 dielectric for the fabrication of RRAM devices with higher reliability and accuracy. Without requiring photolithography, first we demonstrated ALD of HfO2 patterns uniformly and selectively on Pt bottom electrodes for RRAM but not on the underlying SiO2/Si substrate. RRAM devices fabricated using AS-ALD showed significantly narrower operating voltage range (2.6 × improvement) and resistance states than control devices without AS-ALD, improving the overall reliability of RRAM. Irrespective of device size (1 × 1, 2 × 2, and 5 × 5 μm2), we observed similar improvement, which is an inherent outcome of the AS-ALD technique. Our demonstration of AS-ALD for improved RRAM devices could further encourage the adoption of such techniques for other data storage technologies, including phase-change, magnetic, and ferroelectric RAM.-
dc.description.sponsorshipThe area-selective atomic layer deposition development was supported in part by NEW LIMITS, a center in nCORE, a Semiconductor Research Corporation (SRC) program sponsored by NIST, through award no. 70NANB17H041. This work was partially supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (nos. 2021R1F1A1063671 and 2021R1A4A1033155). E.P. and H.S.P.W. acknowledge support from the member companies of the Stanford Non-Volatile Memory Technology Research Initiative (NMTRI). A.I.K. acknowledges support from the Stanford Graduate Fellowship. The authors thank R. Islam for useful discussions at the initial phase of this work during its conceptualization. A.I.K. is thankful to M. Chen for the lab support.-
dc.language.isoeng-
dc.publisherAmerican Chemical Society-
dc.subject.meshArea selective-
dc.subject.meshArea-selective atomic layer deposition-
dc.subject.meshAtomic-layer deposition-
dc.subject.meshData storage-
dc.subject.meshData storage devices-
dc.subject.meshFilament confinement-
dc.subject.meshHigh volumes-
dc.subject.meshNeuromorphic computing-
dc.subject.meshRandom access memory-
dc.subject.meshResistive random-access memory-
dc.titleArea-Selective Atomic Layer Deposition for Resistive Random-Access Memory Devices-
dc.typeArticle-
dc.citation.endPage43093-
dc.citation.startPage43087-
dc.citation.titleACS Applied Materials and Interfaces-
dc.citation.volume15-
dc.identifier.bibliographicCitationACS Applied Materials and Interfaces, Vol.15, pp.43087-43093-
dc.identifier.doi10.1021/acsami.3c05822-
dc.identifier.pmid37656599-
dc.identifier.scopusid2-s2.0-85171203080-
dc.identifier.urlhttp://pubs.acs.org/journal/aamick-
dc.subject.keywordarea-selective atomic layer deposition-
dc.subject.keyworddata storage device-
dc.subject.keyworddielectrics-
dc.subject.keywordfilament confinement-
dc.subject.keywordresistive random-access memory-
dc.description.isoafalse-
dc.subject.subareaMaterials Science (all)-
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