Ajou University repository

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Showing results 1 to 10 of 875 (Search time: 0.0 seconds).

Frequency doubler utilizing hetero gate dielectric tunnel field-effect transistor
  • 2024-04-01
  • Physica Scripta, Vol.99
  • Institute of Physics
상수 복소 곱셈기를 적용한 고속 저면적 FFT 프로세서
  • 신성경
  • 2015-08
  • The Graduate School, Ajou University
Reconciling Output and Unemployment Fiscal Multipliers
  • 2019-10-02
  • Global Economic Review, Vol.48, pp.378-395
  • Routledge
A DLL based clock multiplier using rotational DCDL and PRNG for spur reductionoa mark
  • 2019-01-01
  • IEICE Electronics Express, Vol.16
  • Institute of Electronics Information Communication Engineers
디지털 위성방송 수신기를 위한 효율적인 주파수 동기회로 설계
  • 윤형진
  • 2008-02
  • The Graduate School, Ajou University
A 28.7V Modular Supply Multiplying Pulser with 75.4% Power Reduction Relative to CV2f
  • 2021-03-01
  • IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.68, pp.858-862
  • Institute of Electrical and Electronics Engineers Inc.
불균일한 플라스마 및 메타물질에서의 모드변환: 불변 끼워넣기 이론의 적용
  • YU, Dae Jung
  • 2012-02
  • The Graduate School, Ajou University
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