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Hardware implementation for hybrid active NPC converters using FPGA-based dual pulse width modulation
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Publication Year
2021-11-01
Publisher
Springer
Citation
Journal of Power Electronics, Vol.21, pp.1669-1679
Keyword
ConvertersFPGAHANPCHardwareMultilevel inverters
Mesh Keyword
Analog modulationsAnalog referenceControl schemesDynamic controlsHardware configurationsHardware implementationsReconfigurable computingStandalone systems
All Science Classification Codes (ASJC)
Control and Systems EngineeringElectrical and Electronic Engineering
Abstract
Recent developments in power electronics technologies have resulted in a need for fast responses and dynamic control. However, existing control schemes are still limited to the available digital signal processors (DSPs) and their associated high prices. The field-programmable gate array (FPGA) offers fast performance and high control flexibility by providing a reconfigurable computing speed. However, it has some implementation limitations in standalone systems. In this regard, this paper presents a hardware setup for a three-level hybrid active neutral point inverter (HANPC) using a FPGA and a DSP. A unique method using digital and analog modulation is designed in this study using Vivado software. The proposed method depends on receiving analog reference signals from the DSP and then performing all the required processes using the FPGA. Direct pulse width modulation is generated to control the HANPC without changing the hardware configuration of the main topology. The implemented hardware is based on a 15 kW HANPC topology that is mainly controlled by a Digilent Zybo-Z7-20 FPGA. The effectiveness of the proposed system was verified by experimental results.
Language
eng
URI
https://dspace.ajou.ac.kr/dev/handle/2018.oak/32242
DOI
https://doi.org/10.1007/s43236-021-00305-w
Fulltext

Type
Article
Funding
This work was supported by the Korea Institute of Energy Technology Evaluation and Planning (KETEP) and the Ministry of Trade, Industry and Energy (MOTIE) of the Republic of Korea (No. 20194030202370, No. 20206910100160).
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Lee, Kyo-Beum이교범
Department of Electrical and Computer Engineering
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