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Hardware implementation for hybrid active NPC converters using FPGA-based dual pulse width modulation
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dc.contributor.authorHalabi, Laith M.-
dc.contributor.authorAlsofyani, Ibrahim Mohd-
dc.contributor.authorLee, Kyo Beum-
dc.date.issued2021-11-01-
dc.identifier.urihttps://dspace.ajou.ac.kr/dev/handle/2018.oak/32242-
dc.description.abstractRecent developments in power electronics technologies have resulted in a need for fast responses and dynamic control. However, existing control schemes are still limited to the available digital signal processors (DSPs) and their associated high prices. The field-programmable gate array (FPGA) offers fast performance and high control flexibility by providing a reconfigurable computing speed. However, it has some implementation limitations in standalone systems. In this regard, this paper presents a hardware setup for a three-level hybrid active neutral point inverter (HANPC) using a FPGA and a DSP. A unique method using digital and analog modulation is designed in this study using Vivado software. The proposed method depends on receiving analog reference signals from the DSP and then performing all the required processes using the FPGA. Direct pulse width modulation is generated to control the HANPC without changing the hardware configuration of the main topology. The implemented hardware is based on a 15 kW HANPC topology that is mainly controlled by a Digilent Zybo-Z7-20 FPGA. The effectiveness of the proposed system was verified by experimental results.-
dc.description.sponsorshipThis work was supported by the Korea Institute of Energy Technology Evaluation and Planning (KETEP) and the Ministry of Trade, Industry and Energy (MOTIE) of the Republic of Korea (No. 20194030202370, No. 20206910100160).-
dc.language.isoeng-
dc.publisherSpringer-
dc.subject.meshAnalog modulations-
dc.subject.meshAnalog reference-
dc.subject.meshControl schemes-
dc.subject.meshDynamic controls-
dc.subject.meshHardware configurations-
dc.subject.meshHardware implementations-
dc.subject.meshReconfigurable computing-
dc.subject.meshStandalone systems-
dc.titleHardware implementation for hybrid active NPC converters using FPGA-based dual pulse width modulation-
dc.typeArticle-
dc.citation.endPage1679-
dc.citation.startPage1669-
dc.citation.titleJournal of Power Electronics-
dc.citation.volume21-
dc.identifier.bibliographicCitationJournal of Power Electronics, Vol.21, pp.1669-1679-
dc.identifier.doi10.1007/s43236-021-00305-w-
dc.identifier.scopusid2-s2.0-85114152790-
dc.identifier.urlhttps://www.springer.com/journal/43236-
dc.subject.keywordConverters-
dc.subject.keywordFPGA-
dc.subject.keywordHANPC-
dc.subject.keywordHardware-
dc.subject.keywordMultilevel inverters-
dc.description.isoafalse-
dc.subject.subareaControl and Systems Engineering-
dc.subject.subareaElectrical and Electronic Engineering-
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