Ajou University repository

IEEE Electron Device Letters
ISSN
  • E1558-0563
  • P0741-3106
Publisher

Institute of Electrical and Electronics Engineers

Listed on
(Coverage)

JCR1997-2023

SJR1999-2020;2022-2023

CiteScore2011-2023

SCI2010-2019

SCIE2010-2024

CC2016-2024

SCOPUS2017-2024

Active
Active

based on the information

  • SCOPUS:2024-10
Country
USA
Aime & Scopes
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
Homepage
https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=55 
Article List

Showing results 1 to 4 of 4

First Demonstration of Thermally Stable Zr:HfO2Ferroelectrics via Inserting AlN Interlayer
  • Lee, Sangmok;
  • Kim, Giuk;
  • Lee, Sangho;
  • Shin, Hunbeom;
  • Lim, Youngjin;
  • Kim, Kang;
  • Kim, Do Hyung;
  • Oh, Il Kwon;
  • Ko Park, Sang Hee;
  • Ahn, Jinho;
et al
  • 2024-01-01
  • IEEE Electron Device Letters, Vol.45 No.9, pp.1578-1581
  • Institute of Electrical and Electronics Engineers Inc.
Positive Interaction between Charge Trapping and Polarization Switching in Metal-Interlayer-Ferroelectric-Interlayer-Silicon (MIFIS) Ferroelectric Field-Effect Transistor
  • Choi, Hyojun;
  • Kim, Giuk;
  • Lee, Sangho;
  • Shin, Hunbeom;
  • Lim, Youngjin;
  • Kim, Kang;
  • Kim, Do Hyung;
  • Oh, Il Kwon;
  • Park, Sang Hee Ko;
  • Ahn, Jinho;
et al
  • 2024-01-01
  • IEEE Electron Device Letters, Vol.45 No.12, pp.2351-2354
  • Institute of Electrical and Electronics Engineers Inc.
Optimizing De-Trap Pulses in Gate-Injection Type Ferroelectric NAND Cells to Minimize Read after Write Delay Issue
  • Kim, Giuk;
  • Choi, Hyojun;
  • Cho, Hongrae;
  • Lee, Sangho;
  • Shin, Hunbeom;
  • Kang, Hyunjun;
  • Kim, Hoon;
  • Shin, Seokjoong;
  • Park, Seonjae;
  • Kwon, Sunseong;
et al
  • 2024-01-01
  • IEEE Electron Device Letters, Vol.45 No.12, pp.2359-2362
  • Institute of Electrical and Electronics Engineers Inc.
Approaching the Nernst Detection Limit in an Electrolyte-Gated Metal Oxide Transistor
  • 2021-01-01
  • IEEE Electron Device Letters, Vol.42 No.1, pp.50-53
  • Institute of Electrical and Electronics Engineers Inc.
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