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DC-link Ripple Current Reduction in Back-to-back converters with DPWM
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Publication Year
2018-10-22
Journal
2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
Publisher
Institute of Electrical and Electronics Engineers Inc.
Citation
2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018, pp.4109-4113
Mesh Keyword
Back-to-back converterDc link capacitorDiscontinuous pulse width modulations (DPWM)Reduction methodReference voltagesRipple currentsThermal processVoltage conversion
All Science Classification Codes (ASJC)
Energy Engineering and Power TechnologyElectrical and Electronic Engineering
Abstract
The DC-link capacitor is the most vulnerable element of a voltage conversion system. The ripple current, flowing through it, causes thermal processes, which shorten the lifespan of the component. When a discontinuous pulse width modulation (DPWM) is applied to a back-to-back converter, the DC-link ripple current increases at the intervals with the different clamping directions of both converters i.e. The first converter's reference voltage is attached to the positive bus of the DC-link, while the reference voltage of the second converter is connected to the opposite bus or vice versa. Alternatively, the ripple current is lower when the clamping states of both inverters are the same. This paper proposes a reduction method of the DC-link capacitor ripple current of the back-to-back converters using the DPWM, considering all the clamping states. The effectiveness of the proposed method is verified by simulation.
Language
eng
URI
https://aurora.ajou.ac.kr/handle/2018.oak/36335
https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85057299079&origin=inward
DOI
https://doi.org/10.23919/ipec.2018.8507484
Journal URL
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8476150
Type
Conference
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Lee, Kyo-Beum이교범
Department of Electrical and Computer Engineering
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