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Microstrip Patch Array Antenna Using a Parallel and Series Combination Feed Network
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Publication Year
2018-07-02
Journal
ISAP 2018 - 2018 International Symposium on Antennas and Propagation
Publisher
Institute of Electrical and Electronics Engineers Inc.
Citation
ISAP 2018 - 2018 International Symposium on Antennas and Propagation
Keyword
Feed networklow side lobe levelmicrostrip patch array antenna
Mesh Keyword
Distribution ratioFeed networksHigh gainHigh-lowLow side lobe levelLow sidelobeMicrostrip patch array antennaMicrostrip patch arraysPatch array antennasPower distributions
All Science Classification Codes (ASJC)
Signal ProcessingComputer Networks and CommunicationsInstrumentation
Abstract
In this paper, we describe a4 × 4 microstrip patch array antenna with a high gain and low side lobe level (SLL) using a parallel and series combination feed network with different power distribution ratios. Several quarter-wavelength impedance transformers are connected, and the power distribution ratio is controlled by adjusting the characteristic impedance of the feed network. The optimized 4 × 4 microstrip patch array antenna has a S 11 < (-)10 dB impedance bandwidth of 220 MHz which is a fractional bandwidth of 2.1%. At 12.5 GHz, the antenna has a gain of 18.2 dBi and SLLs of-28.0 and-26.5 dB in the x-z and y-z planes, respectively. The size of the array antenna is 100 mm × 100 mm × 0.7874 mm (3.5λ o × 3.5 λ o × 0.028 λ oat 12.5 GHz).
Language
eng
URI
https://aurora.ajou.ac.kr/handle/2018.oak/36235
https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85062781817&origin=inward
Journal URL
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8610358
Type
Conference
Funding
This work was supported in part by Institute for Information & Communications Technology Promotion (IITP) grant funded by the Korea government (MSIP) (No. 2017-0-00959, University ICT Basic Research Lab).
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Park, Ikmo  Image
Park, Ikmo 박익모
Department of Electrical and Computer Engineering
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