Citation Export
DC Field | Value | Language |
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dc.contributor.author | Yoo, Younwoo | - |
dc.contributor.author | Lee, Hayoung | - |
dc.contributor.author | Ho Shin, Seung | - |
dc.contributor.author | Kang, Sungho | - |
dc.date.issued | 2025-01-01 | - |
dc.identifier.issn | 2169-3536 | - |
dc.identifier.uri | https://dspace.ajou.ac.kr/dev/handle/2018.oak/34687 | - |
dc.description.abstract | The continuous progress in semiconductor technology, particularly in nanotechnology, has led to smaller memory cells and increased fault frequency due to their proximity. These faults reduce memory yield and raise production costs. Redundancy Analysis (RA) offers an effective solution by allocating spare cells within memory to repair faulty lines. The main goal of RA is to optimally place spare cells rapidly to achieve the highest repair rate, resulting in the development of various RA methods. In modern memory architectures, complex spare structures are essential for improving repair rates. However, traditional RA methods can be too time-consuming for such structures, limiting the repair of multiple memories. This paper proposes a method called RAPID, which leverages GPU technology for the parallel repair of multiple memories. RAPID generates repair cases by segmenting areas based on available spare types, ensuring efficient GPU memory use and enabling simultaneous repairs. Repair cases are applied immediately upon fault detection during testing, significantly reducing repair time. Experimental results show that RAPID can repair more memory units in less repair time than previous GPU-based RA methods under the same GPU and CPU memory specifications. | - |
dc.description.sponsorship | This work was supported by K-CHIPS (Korea Collaborative & High-tech Initiative for Prospective Semiconductor Research) (RS-2023-00301703, 23045-15TC) funded by the Ministry of Trade, Industry & Energy (MOTIE, Korea) (1415188224). | - |
dc.language.iso | eng | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.subject.mesh | Analysis method | - |
dc.subject.mesh | Analysis time | - |
dc.subject.mesh | Graphic processing unit | - |
dc.subject.mesh | Graphics processing | - |
dc.subject.mesh | Processing units | - |
dc.subject.mesh | Redundancy analysis | - |
dc.subject.mesh | Redundancy analyze | - |
dc.subject.mesh | Repair rate | - |
dc.subject.mesh | Spare cells | - |
dc.subject.mesh | Yield | - |
dc.title | RAPID: Redundancy Analysis With Parallelized and Intelligent Distribution | - |
dc.type | Article | - |
dc.citation.endPage | 2100 | - |
dc.citation.startPage | 2089 | - |
dc.citation.title | IEEE Access | - |
dc.citation.volume | 13 | - |
dc.identifier.bibliographicCitation | IEEE Access, Vol.13, pp.2089-2100 | - |
dc.identifier.doi | 10.1109/access.2024.3523940 | - |
dc.identifier.scopusid | 2-s2.0-85214107537 | - |
dc.identifier.url | http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639 | - |
dc.subject.keyword | Analysis time | - |
dc.subject.keyword | graphics processing unit (GPU) | - |
dc.subject.keyword | memory | - |
dc.subject.keyword | redundancy analysis (RA) | - |
dc.subject.keyword | repair rate | - |
dc.subject.keyword | yield | - |
dc.description.isoa | true | - |
dc.subject.subarea | Computer Science (all) | - |
dc.subject.subarea | Materials Science (all) | - |
dc.subject.subarea | Engineering (all) | - |
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