Ajou University repository

High Efficiency and Low Complexity Dual-Reference Voltage-Based Pulse Width Modulation for Three-Phase Five-Level HANPC Inverters
Citations

SCOPUS

3

Citation Export

DC Field Value Language
dc.contributor.authorHakami, Samer Saleh-
dc.contributor.authorHalabi, Laith M.-
dc.contributor.authorLee, Kyo Beum-
dc.date.issued2024-07-01-
dc.identifier.urihttps://dspace.ajou.ac.kr/dev/handle/2018.oak/33862-
dc.description.abstractThis study proposes a low complex and high efficient dual-reference voltage-based pulse width modulation (DRV-PWM) scheme for three-phase five-level hybrid active neutral-point-clamped (HANPC) inverters. Although phase-shifted carrier PWM (PSC-PWM) is capable of naturally balancing dc-link and flying capacitors voltages, such a process requires a tedious and sophisticated adjustment of the phase-shift between the PWM signals, particularly in a digital signal processor (DSP). As a result, a phase-delay eventually occurs, which leads to unevenly distributed thermal losses among the three phases of the five-level HANPC inverter. Therefore, this study introduces an alternative switching scheme that has the same merits as the conventional PSC-PWM in naturally balancing the voltages without requiring voltage sensors. It also balances the thermal losses across the three phases, which enhances the reliability and efficiency of the switching devices. The proposed DRV-PWM is experimentally evaluated in comparison to conventional PSC-PWM on a TMS320F28377S DSP. The experimental results reveal that the proposed DRV-PWM effectively synchronizes the execution of the three-phase pole voltages while also keeping the thermal losses evenly distributed among the three phases.-
dc.description.sponsorshipThis work was supported in part by the Korea Institute of Energy Technology Evaluation and Planning (KETEP) and the Ministry of Trade, Industry & Energy (MOTIE) of the Republic of Korea under Grant 20206910100160 and Grant 20225500000110.-
dc.language.isoeng-
dc.publisherKorean Institute of Electrical Engineers-
dc.subject.meshActive neutral point clamped-
dc.subject.meshCarrier pulse-
dc.subject.meshDigital signal processor-
dc.subject.meshDual-reference voltage-
dc.subject.meshFive-level hybrid active neutral-point-clamped inverter-
dc.subject.meshNeutral-point clamped inverters-
dc.subject.meshPhase shifted-
dc.subject.meshPhase shifted carrier pulse width modulation-
dc.subject.meshPulsewidth modulations (PWM)-
dc.subject.meshReference voltages-
dc.subject.meshThermal loss-
dc.subject.meshThermal loss balancing-
dc.subject.meshTime-delays-
dc.titleHigh Efficiency and Low Complexity Dual-Reference Voltage-Based Pulse Width Modulation for Three-Phase Five-Level HANPC Inverters-
dc.typeArticle-
dc.citation.endPage3057-
dc.citation.startPage3047-
dc.citation.titleJournal of Electrical Engineering and Technology-
dc.citation.volume19-
dc.identifier.bibliographicCitationJournal of Electrical Engineering and Technology, Vol.19, pp.3047-3057-
dc.identifier.doi10.1007/s42835-023-01763-x-
dc.identifier.scopusid2-s2.0-85180512244-
dc.identifier.urlhttps://www.springer.com/journal/42835-
dc.subject.keywordDigital signal processor (DSP)-
dc.subject.keywordDual-reference voltage-
dc.subject.keywordFive-level hybrid active neutral-point-clamped (HANPC) inverters-
dc.subject.keywordPhase shifted carrier pulse width modulation (PSC-PWM)-
dc.subject.keywordThermal losses balancing-
dc.subject.keywordTime-delay-
dc.description.isoafalse-
dc.subject.subareaElectrical and Electronic Engineering-
Show simple item record

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

 Lee, Kyo-Beum Image
Lee, Kyo-Beum이교범
Department of Electrical and Computer Engineering
Read More

Total Views & Downloads

File Download

  • There are no files associated with this item.