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AJPEG: A 26.4-pJ/pixel, 252-fps, 128×128 Image Sensor with an In-Sensor Analog DCT Processor for Data Compression
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Publication Year
2025-01-01
Journal
Proceedings of the Custom Integrated Circuits Conference
Publisher
Institute of Electrical and Electronics Engineers Inc.
Citation
Proceedings of the Custom Integrated Circuits Conference
Mesh Keyword
Analog to digital convertersArts imageAutonomous VehiclesBuilding blockesDiscrete cosinesEnergyEnergy-consumptionFrames per secondsSmart phonesState of the art
All Science Classification Codes (ASJC)
Electrical and Electronic Engineering
Abstract
An image sensor is one of the most important building blocks of modern electronics, such as smartphones, drones, and autonomous vehicles. The state-of-the-art image sensor captures an incredibly detailed, high-resolution image [1]-[3], however, it also generates a large amount of data, which overwhelms the downstream processing. To address this challenge, recent works have investigated in- and near-sensor data compression techniques [4]-[14]. [4] is one of the few works which demonstrated the end-to-end systems (containing pixels, compression hardware, and analog-to-digital converters [ADC]). However, it consumes a significant amount of energy of 5919 pJ/pixel, of which the analog discrete cosine transform (DCT) processor takes 58%. On the other hand, [5] proposed the analog compressor and ADC systems (no pixels). However, it also consumes a non-negligible amount of energy (404 pJ/pixel) and exhibits a limited performance of only 6 frame-per-second (fps). In contrast, [6], [7] proposed digital DCT processors, which reduce the energy consumption down to 29-126 pJ/pixel. However, they require the analog-digital conversion of every pixel, which would significantly increase the overall energy consumption.
Language
eng
URI
https://aurora.ajou.ac.kr/handle/2018.oak/38589
https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=105007021623&origin=inward
DOI
https://doi.org/10.1109/cicc63670.2025.10982958
Type
Conference Paper
Funding
This work is supported in part by Catalyst Foundation and COGNISENSE, one of seven centers in JUMP 2.0, an SRC program sponsored by DARPA.
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 Jee, Dong Woo Image
Jee, Dong Woo지동우
Department of Electrical and Computer Engineering
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