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SHRCO: Design of an SRAM with High Reliability and Cost Optimization for Safety-Critical Applications
  • Chang, Yang ;
  • Liu, Guangzhu ;
  • Ullah, Inam ;
  • Shan, Gaoyang ;
  • Wen, Xiaoqing ;
  • Yan, Aibin
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dc.contributor.authorChang, Yang-
dc.contributor.authorLiu, Guangzhu-
dc.contributor.authorUllah, Inam-
dc.contributor.authorShan, Gaoyang-
dc.contributor.authorWen, Xiaoqing-
dc.contributor.authorYan, Aibin-
dc.date.issued2024-01-01-
dc.identifier.urihttps://aurora.ajou.ac.kr/handle/2018.oak/37132-
dc.identifier.urihttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85204795083&origin=inward-
dc.description.abstractThis paper proposes a novel radiation-hardened high-reliability SRAM cell, namely SHRCO, with 12 transistors for robust value storage as well as 6 transistors for parallel access operations. Using separated and error-interceptive feedback paths, the proposed cell has a complete self-recoverability from single-node upset (SNUs) at all single nodes and an excellent self-recoverability from double-node upsets (DNUs) at a part of node pairs. In addition, the proposed cell has superior access operation speed due to the inclusion of extra parallel access transistors. Simulation results show that the proposed cell has the largest number of node pairs that can self-recover from DNUs. Moreover, compared to the existing radiation-hardened SRAM cells, the proposed cell saves 28% of read time and 3% of write time on average.-
dc.language.isoeng-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.subject.meshCircuit reliability-
dc.subject.meshDouble-nodeupset-
dc.subject.meshHigh costs-
dc.subject.meshHigh reliability-
dc.subject.meshNode pairs-
dc.subject.meshRadiation-hardened-
dc.subject.meshRecoverability-
dc.subject.meshSelf-recovery-
dc.subject.meshSoft error-
dc.subject.meshSRAM Cell-
dc.titleSHRCO: Design of an SRAM with High Reliability and Cost Optimization for Safety-Critical Applications-
dc.typeConference-
dc.citation.conferenceDate2024.8.18. ~ 2024.8.20.-
dc.citation.conferenceName8th IEEE International Test Conference in Asia, ITC-Asia 2024-
dc.citation.editionProceedings - ITC-Asia 2024: 8th IEEE International Test Conference in Asia-
dc.citation.titleProceedings - ITC-Asia 2024: 8th IEEE International Test Conference in Asia-
dc.identifier.bibliographicCitationProceedings - ITC-Asia 2024: 8th IEEE International Test Conference in Asia-
dc.identifier.doi10.1109/itc-asia62534.2024.10661340-
dc.identifier.scopusid2-s2.0-85204795083-
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=10661305-
dc.subject.keywordcircuit reliability-
dc.subject.keyworddouble-nodeupset-
dc.subject.keywordself-recovery-
dc.subject.keywordsoft error-
dc.subject.keywordSRAM-
dc.type.otherConference Paper-
dc.description.isoafalse-
dc.subject.subareaComputer Vision and Pattern Recognition-
dc.subject.subareaHardware and Architecture-
dc.subject.subareaInformation Systems and Management-
dc.subject.subareaElectrical and Electronic Engineering-
dc.subject.subareaSafety, Risk, Reliability and Quality-
dc.subject.subareaInstrumentation-
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SHAN GAOYANGSHAN, GAOYANG
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