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3-레벨 전압형 인버터의 커패시터 수명 연장을 위한 DC-링크 리플 전류 최소화 기법
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 이교범 | - |
| dc.contributor.author | 이상현 | - |
| dc.date.accessioned | 2025-01-25T01:36:04Z | - |
| dc.date.available | 2025-01-25T01:36:04Z | - |
| dc.date.issued | 2023-08 | - |
| dc.identifier.other | 32856 | - |
| dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/24559 | - |
| dc.description | 학위논문(석사)--아주대학교 일반대학원 :전자공학과,2023. 8 | - |
| dc.description.tableofcontents | 제1장 서론 1 <br>제2장 SVPWM 적용에 따른 DC-링크 리플 전류 분석 3 <br>제3장 전해 커패시터의 수명 예측 8 <br>제4장 DC-링크 리플 전류 최소화 기법 10 <br> 4.1 전압 벡터 선정 10 <br> 4.2 중성점 전압 밸런싱 14 <br>제5장 시뮬레이션 17 <br> 5.1 시뮬레이션 회로도 및 파라미터 17 <br> 5.2 시뮬레이션 결과 18 <br>제6장 실험 24 <br> 6.1 실험 환경 24 <br> 6.2 실험 결과 25 <br>제7장 결론 26 <br>참고문헌 27 | - |
| dc.language.iso | kor | - |
| dc.publisher | The Graduate School, Ajou University | - |
| dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
| dc.title | 3-레벨 전압형 인버터의 커패시터 수명 연장을 위한 DC-링크 리플 전류 최소화 기법 | - |
| dc.title.alternative | DC-Link Ripple Current Minimization Method to Extend Capacitor Lifetime in Three-Level Voltage Source Inverters | - |
| dc.type | Thesis | - |
| dc.contributor.affiliation | 아주대학교 대학원 | - |
| dc.contributor.alternativeName | Sang-Hyeon Lee | - |
| dc.contributor.department | 일반대학원 전자공학과 | - |
| dc.date.awarded | 2023-08 | - |
| dc.description.degree | Master | - |
| dc.identifier.localId | T000000032856 | - |
| dc.identifier.url | https://dcoll.ajou.ac.kr/dcollection/common/orgView/000000032856 | - |
| dc.subject.keyword | 전압형 인버터 | - |
| dc.subject.keyword | 커패시터 수명 | - |
| dc.description.alternativeAbstract | This thesis presents a DC-link ripple current minimization method to extend the capacitor lifetime in three-level voltage source inverters (3L-VSIs). A DC-link ripple current is defined as the current that flows through the DC-link capacitors. When the space vector pulse width modulation (SVPWM) is adopted as a modulation method of the 3L-VSIs, a large DC-link ripple current is produced when the small vectors are applied. The produced large DC-link ripple current generates high heat losses in the DC-link capacitors, which shortens their lifetime and ultimately reduces the reliability of the 3L-VSIs. To mitigate the problem caused by the large DC-link ripple current, the proposed method substitutes the small vectors of SVPWM with large vectors. As the large vectors induce zero DC-link ripple currents, the minimized DC-link ripple currents and resulting extended lifetime of DC-link capacitors can be attained with the proposed method. In addition, the proposed method guarantees the neutral point voltage balancing, which is essential in the operation of 3L-VSIs. The performance and feasibility of the proposed method are demonstrated by simulation and experimental results. | - |
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- Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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