이교범 이인호 2024-02 33458 https://aurora.ajou.ac.kr/handle/2018.oak/39267 학위논문(석사)--전자공학과,2024. 2 This thesis presents a power loss profile and junction temperature estimation method for SiC-based power semiconductor devices in a three-level neutral point clamped (NPC) inverter. Thermal analysis of the power devices is essential for enhancing the reliability of power conversion systems (PCSs) since excessive temperature rise in devices can lead to failures such as thermal degradation or material distortion. The power loss is determined by the switching states, which are controlled as the inverter operates. This power loss is subsequently spread out into the form of thermal energy through materials within the power transfer path, including die, thermal interface material (TIM), and heat sink. Thermal equivalent circuit analysis is utilized to estimate the junction temperature variation caused by the power loss to model this phenomenon. In this paper, a power loss profile of SiC-based power devices in three-level NPC inverters is designed and the power loss is converted into thermal behavior using an RC thermal network model to estimate the junction temperature. The thermal model reflects the physical characteristics of the power devices. The validity of the junction temperature estimation method was verified through simulation and experimental results. 제 1 장 서론 1_x000D_ <br>제 2 장 인버터를 구성하는 SiC MOSFET의 동작과 순시 전력 손실 계산 4_x000D_ <br> 2.1 3-레벨 NPC 인버터의 스위칭 상태 정의 4_x000D_ <br> 2.2 SiC MOSFET의 전력 손실 구성 8_x000D_ <br> 2.3 순시 전력 손실 계산 12_x000D_ <br>제 3 장 열 모델링을 이용한 접합 온도 추정 14_x000D_ <br> 3.1 RC thermal network model 해석 14_x000D_ <br> 3.2 전력 반도체 소자의 접합 온도 추정 16_x000D_ <br>제 4 장 시뮬레이션 결과 19_x000D_ <br> 4.1 시뮬레이션 회로도 및 파라미터 19_x000D_ <br> 4.2 전력 손실 계산 및 접합 온도 추정 시뮬레이션 결과 22_x000D_ <br>제 5 장 실험 결과 25_x000D_ <br> 5.1 실험 세트 및 환경 25_x000D_ <br> 5.2 전력 반도체 소자의 접합 온도 실측 결과 27_x000D_ <br>제 6 장 결론 31_x000D_ <br>참고문헌 32_x000D_ kor The Graduate School, Ajou University 아주대학교 논문은 저작권에 의해 보호받습니다. SiC 기반 3-레벨 NPC 인버터의 전력 손실 프로파일 및 접합 온도 추정 Thesis 아주대학교 대학원 Lee Inho 일반대학원 전자공학과 2024-02 Master https://dcoll.ajou.ac.kr/dcollection/common/orgView/000000033458 3-level NPC inverter Junction temperature Power loss SiC MOSFET This thesis presents a power loss profile and junction temperature estimation method for SiC-based power semiconductor devices in a three-level neutral point clamped (NPC) inverter. Thermal analysis of the power devices is essential for enhancing the reliability of power conversion systems (PCSs) since excessive temperature rise in devices can lead to failures such as thermal degradation or material distortion. The power loss is determined by the switching states, which are controlled as the inverter operates. This power loss is subsequently spread out into the form of thermal energy through materials within the power transfer path, including die, thermal interface material (TIM), and heat sink. Thermal equivalent circuit analysis is utilized to estimate the junction temperature variation caused by the power loss to model this phenomenon. In this paper, a power loss profile of SiC-based power devices in three-level NPC inverters is designed and the power loss is converted into thermal behavior using an RC thermal network model to estimate the junction temperature. The thermal model reflects the physical characteristics of the power devices. The validity of the junction temperature estimation method was verified through simulation and experimental results.