Superjunction IGBT with split carrier storage layer

Abstract

The insulated gate bipolar transistor (IGBT) is crucial in high-voltage applications due to its characteristics, like breakdown voltage (BV) and on-state voltage V CE(sat). However, its slower turn-off time, attributed to hole mobility, restricts its frequency range. Techniques such as the carrier storage layer (CSL) and super-junction (SJ) structures aim to optimize BV and V CE(sat) through hole density and field distribution. Combining CSL and SJ offers advantages, yet challenges remain regarding E-field concentration. In this work, the split CSL concept introduces a solution by optimizing BV and E off through effective field distribution and hole extraction acceleration respectively while maintaining V CE(sat). Split CSL, which is divided into a high doping layer (HDL) and a low doping layer (LDL), reduces the burden on the gate oxide by distributing the E-field evenly when in the off-state due to the difference in doping concentration. During the turn-off, the hole current is concentrated on the LDL, which has relatively low resistance, thereby accelerating hole extraction. Simulation-based results showcase improvements in the proposed structure’s properties. Further optimization of HDL and LDL concentrations enhances the structure’s performance. It is clear that the split CSL structure presents the potential for advancing IGBT capabilities. The application of the split CSL structure resulted in significant improvements: the turn-off time was reduced by 32.4% and the BV increased by 32.5 V compared to conventional CSL-SJ structures. These enhancements highlight the effectiveness of the split CSL design in optimizing the IGBT’s performance attribute.