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Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunctionoa mark
  • Oh, Chang Hwan ;
  • Babu, Roshni Satheesh ;
  • Kim, Seung Il ;
  • Lee, Dong Park ;
  • Sim, Gyuhyeon ;
  • Lee, Do Hyeon ;
  • Je, Yeonjin ;
  • Hwi, Kim Chan ;
  • Jeong, Woo Jin ;
  • Ryu, Gyeong Hee ;
  • Kim, Jun Young ;
  • Nam, Sang Yong ;
  • Lee, Jae Hyun ;
  • Park, Jun Hong
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Publication Year
2022-01-01
Publisher
Taylor and Francis Ltd.
Citation
Journal of Asian Ceramic Societies, Vol.10, pp.722-730
Keyword
chemical etchingheterostructureMoSe2O2 plasmasurface roughness
Mesh Keyword
Channel layersChemical etchingElectrical performanceElectronics applicationsMaterial-basedO2 plasmaStep surfaceSurface engineeringThin structureTransition metal dichalcogenides (TMD)
All Science Classification Codes (ASJC)
Ceramics and Composites
Abstract
A tremendous effort has been made to develop 2D materials-based FETs for electronic applications due to their atomically thin structures. Typically, the electrical performance of the device can vary with the surface roughness and thickness of the channel layer. Therefore, a two-step surface engineering process is demonstrated to tailor the surface roughness and thickness of MoSe2 multilayers involving exposure of O2 plasma followed by dipping in (NH4)2S(aq) solution. The O2 plasma treatment generated an amorphous MoOx layer to form a MoOx/MoSe2 heterojunction, and the (NH4)2S(aq) treatment tailored the surface roughness of the heterojunction. The ON/OFF current ratio of MoSe2 FET is about 1.1 × 105 and 5.7 × 104 for bare and chemically etched MoSe2, respectively. The surface roughness of the chemically treated MoSe2 is higher than that of the bare, 4.2 ± 0.5 nm against 3.6 ± 0.5 nm. Conversely, a 1-hour exposure of the multilayer MoOx/MoSe2 heterostructure with the (NH4)2S(aq) solution removed the amorphous oxide layer and scaled down the thickness of MoSe2 from ~92.2 nm to ~38.9 nm. The preliminary study shows that this simple two-step strategy can obtain a higher surface-area-to-volume ratio and thickness engineering with acceptable variation in electrical properties.
ISSN
2187-0764
Language
eng
URI
https://dspace.ajou.ac.kr/dev/handle/2018.oak/32911
DOI
https://doi.org/10.1080/21870764.2022.2117892
Fulltext

Type
Article
Funding
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) [No. 2021R1C1C1012209 and 2020R1A4A4079397].
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