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극 부호를 위한 저지연 Bit-Flipping Successive-Cancellation 복호
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Advisor
선우명훈
Affiliation
아주대학교 일반대학원
Department
일반대학원 전자공학과
Publication Year
2020-02
Publisher
The Graduate School, Ajou University
Keyword
Cyclic Redundancy CheckPolar CodesSuccessive-CancellationSuccessive-Cancellation Flip
Description
학위논문(석사)--아주대학교 일반대학원 :전자공학과,2020. 2
Alternative Abstract
The Successive-cancellation (SC) algorithm of polar codes used a sequential decoding process that decodes one bit at a time. Thus, polar codes can propagate the error if an error occurs. To solve this problem, the SC-Flip (SCF) decoding method was proposed, which can improves the error correction performance by flipping the first error bit. However, it is not suitable for hardware implementation because the latency significantly increases in the worst case. In this paper, we propose an efficient decoding method to reduce the latency of the conventional SCF decoding algorithm. The proposed decoding method divides the information bits into several sub-frames and performs a flip decoding process only within the corresponding sub-frame through cyclic redundancy check (CRC) detection for each sub-frame. As a result of Matlab simulation, the proposed decoding method shows that the average clock cycles are reduced by up to 67.3% at 1dB and up to 10.53% at 2dB while maintaining the high error correction performance of the existing SCF decoding.
Language
eng
URI
https://dspace.ajou.ac.kr/handle/2018.oak/19554
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Type
Thesis
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