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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 권익진 | - |
| dc.contributor.author | 김현우 | - |
| dc.date.issued | 2019--2 | - |
| dc.identifier.other | 28922 | - |
| dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/14940 | - |
| dc.description | 학위논문(석사)--아주대학교 일반대학원 :전자공학과,2019. 2 | - |
| dc.description.tableofcontents | Chapter 1. Introduction…………………………………………...………….. 1 Chapter 2. Conventional CMOS RF rectifier………………………………. 3 Chapter 3. Proposed rectifier with low reverse leakage……………………. 8 3.1. Circuit Design….……………………………………………………. 12 3.1.1. Determining load resistor RL…….…………….……………… 13 3.1.2. Optimizing the number of stages……………………..……….. 14 3.2. Post-layout simulation results ……………………………………….. 16 Chapter 4. Proposed rectifier with three adaptive configurations………… 20 4.1. Circuit design…………………………………………….…………... 21 4.1.1. Control circuit………………………………….……………… 23 4.1.2. Three adaptive configurations………………………..……….. 26 4.2 Post-layout simulation results ………………………………………... 29 Chapter 5. Proposed rectifier with two adaptive configurations…...……… 33 5.1. Circuit design…………………………………………….…………... 34 5.1.1. Revised control circuit……..………………….……………… 35 5.1.2. Two adaptive configurations…..……………………… 37 5.2 Pre-layout simulation results.…………………...……..………… 39 Chapter 6. Conclusion and future work…………………………………… 43 Publications…………………………………………………………………… 45 References…………………………………………………………………… 46 국문요약……………………………………………………………………… 49 | - |
| dc.language.iso | eng | - |
| dc.publisher | The Graduate School, Ajou University | - |
| dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
| dc.title | RF 에너지 하베스팅을 위한 CMOS 정류기 회로의 설계 | - |
| dc.title.alternative | Hyeon-woo Kim | - |
| dc.type | Thesis | - |
| dc.contributor.affiliation | 아주대학교 일반대학원 | - |
| dc.contributor.alternativeName | Hyeon-woo Kim | - |
| dc.contributor.department | 일반대학원 전자공학과 | - |
| dc.date.awarded | 2019. 2 | - |
| dc.description.degree | Master | - |
| dc.identifier.uci | I804:41038-000000028922 | - |
| dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/common/orgView/000000028922 | - |
| dc.description.alternativeAbstract | In this paper, a CMOS cross-coupled RF rectifier improved the reverse leakage current by using a thick-oxide MOSFET with a high threshold voltage as a rectifying device is proposed to improve the power conversion efficiency (PCE). As a result of reducing the reverse leakage current, peak PCE of up to 75.2 % is achieved at an RF input of -13 dBm. Furthermore, a rectifier that operates adaptively in two modes to improve PCE performance at low input is described. Through the operation in the serial mode and the parallel mode, the two peak PCE performance is achieved 61.6 % at a low input of -20 dBm and 65.8 % at a high input of -13 dBm. The proposed rectifier circuit is designed for 900 MHz UHF band applica-tion and implemented using 0.18 μm CMOS technology. This rectifier circuit has an input sensitivity of -16.5 dBm and achieves an input power range to achieve an optimal PCE of 9 dB. | - |
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