A 48×2 CMOS SPAD Sensor With Regulated Dark Count - Park, Hyung Jun; Jee, Dong Woo (IEEE Transactions on Circuits and Systems II: Express Briefs, 2024)
This brief presents a dark count regulation technique for CMOS SPAD array sensor. Proposed global/local dual biasing scheme allows setting an individual excess bias for each SPAD. The column shared calibration block compares each pixel's dark count to a target count value to control the local bias voltage of that pixel. The 48× 2 SPAD sensor chip is implemented in a 0.18~μ \text{m} BCD CMOS process and the proposed technique improves the dark count uniformity by × 2.6. We also demonstrated the linear control of photon detection efficiency as well as the average dark count of the sensor.
Keywords: Dark count regulation; Dark counts; Dual biasing; Excess bias; High-voltage drivers; Semiconductor device measurements; Sensors array; Single photon avalanche diode; SPAD array; SPAD sensor; dark count regulation; dual biasing; excess bias; high voltage driver; SPAD sensor