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A Phase-Locked Minimum-Energy-Point-Tracking Enabled by Unified-Clock-Power-and-Body-Bias Slack Regulation and PI-Ratio Based In-Situ Loop Gain Optimization with 97.4% Supply Voltage Margin Recovery at Minimum-Energy-Point in 28nm FDSOI- Jeong, Minhyeok;
- Gi, Hyungmin;
- Cho, Minsik;
- Kim, Mingyu;
- Kim, Donggyu;
- Park, Sungyong;
- Lee, Woonjae;
- Kim, Seonho;
- Yoon, Yeohoon;
- Han, Shin;
et al
- 2025-01-01
- Proceedings of the Custom Integrated Circuits Conference
- Institute of Electrical and Electronics Engineers Inc.
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